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Addition

The following opcodes are used for addition:

  • ADDI — Add Signed Integer
  • ADDU — Add Unsigned Integer
  • ADDF — Add Floating Point

ADDI — Add Signed Integer

Algorithm
    L2 = L2 + <signed_imm>
    L2 = L2 + <reg_val>
    L2 = L2 + <const>

1
2
3
4
5
6
7
8
; imm +ve
    ADDI    1
; imm -ve
    ADDI    -123
; reg val
    ADDI    val(QT)
; const
    ADDI    SOME_CONST_VAL
Opcode Operand Type Destination
13 Signed 64-bit integer L2 (implicit)

Identified as memonic #13, ADDI is used to add a 64-bit signed value to the L2 register

ADDU — Add Unsigned Integer

Algorithm
    L3 = L3 + <unsigned_imm>
    L3 = L3 + <reg_val>
    L3 = L3 + <const>

1
2
3
4
5
6
; imm +ve
    ADDU    1
; reg val
    ADDU    val(QT)
; const
    ADDU    SOME_CONST_VAL
Opcode Operand Type Destination
18 Unsigned 64-bit integer L3 (implicit)

Identified as memonic #18, ADDU is used to add a 64-bit unsigned value to the L3 register

ADDF — Add Float value

Algorithm
    L1 = L1 + <float>
    L1 = L1 + <reg_val>
    L1 = L1 + <const>

1
2
3
4
5
6
; imm float
    ADDF    3.14
; reg val
    ADDF    val(QT)
; const
    ADDF    SOME_CONST_VAL
Opcode Operand Type Destination
23 64-bit Float Value L1 (implicit)

Identified as memonic #23, ADDF is used to add a 64-bit floating point value to the L1 register